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The HPE Intel Xeon Gold 6128 processor is a powerful solution for server applications designed for high efficiency and scalability. With a clock speed of 3.4 GHz and the ability to reach up to 3.7 GHz in Turbo mode, this processor delivers impressive performance for demanding tasks. It features six cores and supports up to twelve threads, enabling effective multitasking. The architecture is based on a 14nm lithography, providing improved energy efficiency and performance. The processor is designed for use in HPE ProLiant BL460c Gen10 servers and supports a maximum memory capacity of 768 GB across six memory channels with DDR4 SDRAM. These features make the Xeon Gold 6128 an ideal choice for businesses that require reliable and scalable server solutions.

- Maximum TDP of 115 watts for efficient energy consumption
- Supports up to 768 GB of RAM with hexa-channel memory architecture
- Compatible with HPE ProLiant BL460c Gen10 servers
- Provides support for advanced instruction sets such as AVX-512 and SSE4.2
- L3 cache of 19.25 MB for enhanced data processing.

Actual product image HPE E Processor 6128/3. 6Core, Xeon to Proliant BL460c G10 (Socket P, 3.40 GHz, 6 -Core)

Key specifications

Number of processor cores

A multi-core processor (or chip-level multiprocessor, CMP) combines two or more independent cores (normally a CPU) into a single package composed of a single integrated circuit (IC), called a die, or more dies packaged together. A dual-core processor contains two cores, and a quad-core processor contains four cores.

Number of threads

Max. TDP

The thermal design power (TDP), sometimes called thermal design point, refers to the maximum amount of power the cooling system in a computer is required to dissipate. For example, a laptop's CPU cooling system may be designed for a 20 watt TDP, which means that it can dissipate up to 20 watts of heat without exceeding the maximum junction temperature for the computer chip. It can do this using an active cooling method such as a fan or any of the three passive cooling methods, convection, thermal radiation or conduction. Typically, a combination of methods is used. The TDP is typically not the most power the chip could ever draw, such as by a power virus, but rather the maximum power that it would draw when running "real applications". This ensures the computer will be able to handle essentially all applications without exceeding its thermal envelope, or requiring a cooling system for the maximum theoretical power (which would cost more but in favor of extra headroom for processing power).

L3 Cache

Another issue is the fundamental tradeoff between cache latency and hit rate. Larger caches have better hit rates but longer latency. To address this tradeoff, many computers use multiple levels of cache, with small fast caches backed up by larger slower caches.

Multi-level caches generally operate by checking the smallest Level 1 (L1) cache first; if it hits, the processor proceeds at high speed. If the smaller cache misses, the next larger cache (L2) is checked, and so on, before external memory is checked.

As the latency difference between main memory and the fastest cache has become larger, some processors have begun to utilize as many as three levels of on-chip cache.

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HPE E Processor 6128/3. 6Core, Xeon to Proliant BL460c G10

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